Along with the progress of electronic science and technology, the operation voltage level of an electronic component gets lower and lower, and a reduced operation voltage level means the tolerance of an electronic component on the process variation is more low. For example, for a resistance random access memory (RRAM) device, a phase change memory (PCM) or other new-age non-volatile memories (NVM), the operation voltage level (or bias voltage level) thereof is quite low. As these memory devices perform a reading operation, in order to avoid read disturbance, the memory devices must be operated at a low bias voltage during a reading so as to ensure the storage data not to be destroyed.
However, in a semiconductor process, it is often to have process variation. Due to the inconsistency of the thicknesses of the oxide layers or the ion-doped concentrations, the transistor driving current is thereby often not the same as the design value, which is specially in an advanced process more serious. When the process variation occurs, an error of the transistor driving current makes the bias voltage level of the NVM devices drifted, which leads to a reduced production yield or degrade the efficiency. Therefore, a mechanism of detecting the process variation and compensating is required so as to increase the stability of read bias voltage.